Philips Semiconductors
256 × 8-bit static low-voltage RAM with
I 2 C-bus interface
11 DC CHARACTERISTICS
V DD = 2.5 to 6.0 V; V SS = 0 V; T amb = ? 40 to +85 ° C; unless otherwise speci?ed.
Product speci?cation
PCF8570
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
V DD
supply voltage
2.5
?
6.0
V
I DD
supply current
standby mode
V I = V DD or V SS ;
?
?
5
μ A
f SCL = 0 Hz;
T amb = ? 25 to +70 ° C
operating mode
V I = V DD or V SS ;
?
?
200
μ A
f SCL = 100 Hz
V POR
Power-on reset voltage
note 1
1.5
1.9
2.3
V
Inputs, input/output SDA
V IL
LOW level input voltage
note 2
? 0.8
?
0.3V DD
V
V IH
HIGH level input voltage
note 2
0.7V DD
?
V DD + 0.8 V
I OL
I LI
LOW level output current
input leakage current
V OL = 0.4 V
V I = V DD or V SS
3
? 1
?
?
?
+1
mA
μ A
Inputs A0, A1, A2 and TEST
I LI
input leakage current
V I = V DD or V SS
? 250
?
+250
nA
Inputs SCL and SDA
C i
input capacitance
V I = V SS
?
?
7
pF
Low V DD data retention
V DDR
supply voltage for data retention
1
?
6
V
I DDR
supply current
V DDR = 1 V
V DDR = 1 V;
T amb = ? 25 to +70 ° C
?
?
?
?
5
2
μ A
μ A
Power-saving mode (see Figs 13 and 14)
I DDR
t HD2
supply current
recovery time
TEST = V DD ; T amb = 25 ° C
?
?
50
50
400
?
nA
μ s
Notes
1. The Power-on reset circuit resets the I 2 C-bus logic when V DD < V POR . The status of the device after a Power-on reset
condition can be tested by sending the slave address and testing the acknowledge bit.
2. If the input voltages are a diode voltage above or below the supply voltage V DD or V SS an input current will flow; this
current must not exceed ± 0.5 mA.
1999 Jan 06
9
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